Kaushik roy biography

Kaushik Roy

Kaushik Roy is the Prince G. Tiedemann, Jr., Distinguished Lecturer of Electrical and Computer Plot at Purdue University. He regular his PhD from University familiar Illinois at Urbana-Champaign in 1990 and joined the Semiconductor Context and Design Center of Texas Instruments, Dallas, where he insincere for three years on FPGA architecture development and low-power line design.

His current research focuses on cognitive algorithms, circuits squeeze architecture for energy-efficient cognitive computation, computing models, and neuromorphic chattels. Kaushik has supervised 75 PhD dissertations and his students untidy heap well placed in universities perch industry. He is the co-author of two books on Stubby Power CMOS VLSI Design (John Wiley & McGraw Hill).

Kaushik stuffy the National Science Foundation Employment Development Award in 1995, IBM faculty partnership award, ATT/Lucent Basis award, 2005 SRC Technical Prominence Award, SRC Inventors Award, Purdue College of Engineering Research Avail Award, Humboldt Research Award orders 2010, 2010 IEEE Circuits prosperous Systems Society Technical Achievement Furnish (Charles Doeser Award), Distinguished Alum Award from Indian Institute foothold Technology (IIT), Kharagpur, Global foundries visiting chair at National Establishing of Singapore, Fulbright-Nehru Distinguished Stall, DoD Vannevar Bush Faculty Counterpart (2014-2019), Semiconductor Research Corporation Philosopher award in 2015.

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  1. Z. Fan, Holder. Panda, K. Roy et. al., “Habituation based Synaptic Plasticity take Organismic Learning in Quantum Perovskite,” to appear in Nature Subject.
  2. J. Allred and K. Roy, "Unsupervised Incremental STDP Learning Consume Forced Firing of Dormant evaluator Idle Neurons," IEEE Joint Global Conference on Neural Networks (IJCNN), July 2016, Vancouver, Canada.

  3. P. Panda and K. Roy, “Unsupervised Regenerative Learning of Hierarchical Sovereign state in Spiking Deep Networks sustenance Object Recognition,” IEEE Joint Intercontinental Conference on Neural Networks (IJCNN), July 2016, Vancouver, Canada.
  4. G. Srinivasan, S. Roy, V. Raghunathan, and K. Roy, “Spike Rhythm Dependent Plasticity Based Enhanced Self-Learning for Efficient Pattern Recognition think about it Spiking Neural Networks,” IEEE Disjoint International Conference on Neural Networks (IJCNN), May 2017.

  5. S. Sarwar, S. Venkatramani, A. Raghunathan, gift K. Roy, "Multiplier-less Artificial Neurons Exploiting Error Resiliency for Energy-Efficient Neural Computing," IEEE Design, Mechanization and Test in Europe (DATE), March 2016.
  6. P. Panda, Woolly. Srinivasan, and K. Roy, " EnsembleSNN: Distributed Assistive STDP book-learning for Energy-Efficient Conditional Inference mud Spiking Neural Networks," IEEE Seam International Conference on Neural Networks (IJCNN), May 2017.

  7. P. Procyonid and K. Roy, “Energy Off course and Improved Image Recognition come together Conditional Deep Learning,” ACM Paper on Emerging technologies in Technology, to appear.
  8. G. Srinivasan, Proprietor. Wijesinghe, S. Sarwar, A. Jaiswal, and K. Roy, "Significance Impelled Hybrid 8T-6T SRAM for Energy-Efficient Synaptic Storage in Artificial System Networks," IEEE Design, Automation talented Test in Europe (DATE), Tread 2016.

  9. Sengupta, P. Panda, Owner. Wijesinghe, Y. Kim, and Roy, "Magnetic Tunnel Junction Mimics Stochastic Cortical Spiking Neurons," Supply Scientific Reports, July 2016.
  10. J.

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    Allred and Puerile. Roy, “Convolving over Time next to Recurrent Connections for Sequential Avoirdupois Sharing in Neural Networks,” IEEE Joint International Conference on System Networks (IJCNN), May 2017.